This application claims the priority benefit of Taiwan application serial no. 90133197, filed Dec. 31, 2001.
1. Field of Invention
The present invention relates to a fabrication process for forming bumps. More particularly, the present invention relates to the lift-off technology for forming the under bump metallurgy layer in the bump fabrication process.
2. Description of Related Art
At present, the market of multimedia applications rapidly expands. The integrated circuit (IC) packaging needs to be improved following the developing trends of electronic devices such as digitalization, network localization, and user friendliness. In order to meet the above requirements, electronic devices must have multiple functions and high integration, and maintain high operating speed, miniaturization, lightweight, and low cost. High-density packages, such as ball grid arrays (BGAs), chip scale packages (CSPs), flip chips, and multi-chip modules (MCMs) have been developed. The integrated circuit packaging density is determined by the degree of numbers of pins per area unit. For high-density IC packaging, the signal transmitting speed increases as the wiring length decreases. Thus, the application of bumps has become the main trend in the high-density packaging.
FIGS. 1-7 are cross-sectional views illustrating a conventional fabrication process for forming bumps. Referring to the FIG. 1, a wafer 100 is provided with a bonding pad 102 and a protective layer 104. The protective layer 104 protects a surface of the wafer and exposes a surface of the bonding pad 102.
Referring to FIG. 2, a photoresist layer 106 having an opening 108 is formed over the wafer 100. The location of the opening 108 corresponds to the locations of the bonding pad 102, so as to expose the surface of the bonding pad 102. The opening 108 has a structure similar to an undercut (an undercut structure), for example.
Referring to FIG. 3, a conductive layer 109 is formed over the wafer 100 covered with the photoresist layer 106. The conductive layer 109 includes an adhesion layer 110a, a barrier layer 110b, and a wetting (solder) layer 110c. Because of the photoresist layer, the adhesion layer 110a, the barrier layer 110b and the wetting (solder) layer 110c are located on both the bonding pad 102 and the photoresist layer 106. On the other hand, the adhesion layer 110a, the barrier layer 110b and the wetting layer 110c are not present on sidewalls of the opening 108.
Referring to FIG. 4, the photoresist layer 106 is stripped along with the adhesion layer 110a, the barrier layer 110b and the wetting layer 110c on the photoresist layer 106. Therefore, after stripping the photoresist layer, the adhesion layer 110a, the barrier layer 110b and the wetting layer 110c remaining on the bonding pad 102 becomes an under bump metallurgy (UBM) layer 110.
Referring to FIG. 5, after forming the UBM layer 110 on the bonding pad 102, a photoresist layer 112 is formed over the wafer 100 with an opening 114. The opening 114 corresponds to the UBM layer 110, thus exposing the UBM layer 110.
Referring to FIG. 6, a solder paste 116 is filled into the opening 114 of the photoresist layer 112 by electroplating or screen printing.
Referring to FIG. 7, after filling the solder paste, the photoresist layer 112 is stripped and a reflow step is performed, so that the solder paste 116 becomes a globular bump 118.
In the conventional bump fabrication process, the adhesion layer, the barrier layer and the wetting layer on the photoresist layer are removed with the photoresist layer. Subsequently, another mask process is required to define the locations of bump formation. Usually, one mask process further includes dehydration bake, priming, soft bake, exposure, post exposure bake, development, hard bake and etching. Thus, one extra mask process can greatly increase the production cost for the bumps.
The present invention provides a bump fabrication process by using the lift-off technology for lifting off the conductive layer on the photoresist layer, so that the photoresist layer can be used to further define the formation locations of bumps, thus saving one mask process.
Accordingly, the bump fabrication process of the present invention comprises the following steps. A wafer is provided with a patterned photoresist layer formed on the wafer. The patterned photoresist layer has a plurality of openings that expose bonding pads on the wafer. A conductive layer is formed on the photoresist layer and the exposed bonding pads. Afterwards, a sticker film is provided to peel off the conductive layer on the photoresist layer, while the conductive layer within the openings is not removed. A solder paste is filled Into the openings. A reflow step is performed to turn the solder paste filled in the openings into globular bumps. Alternatively, the ball mounting method is used to form bumps. At last, the photoresist layer is removed.
As embodied and broadly described herein, the adhesion between the film and the conductive layer is stronger than the adhesion between the conductive layer and the photoresist layer. The sticker film is, for example, an adhesive tape or other mechanism that can peel the conductive layer from the photoresist layer.
The conductive layer is a stacked layer comprising an adhesive layer, a barrier layer and a wetting layer.
As embodied and broadly described herein, the conductive layer comprises a layer selected from the following group consisting of a titanium-tungsten/nickel-vanadium/copper layer, an aluminum/nickel-vanadium/copper layer, a titanium/nickel-vanadium/copper layer, and a chromium/nickel-vanadium/copper layer. However, the conductive layer should be easily peeled by the sticker film, while the conductive layer adheres well to the bonding pads.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.